loop filter造句
例句與造句
- Loop filter proportion coefficient
環(huán)路濾波器比例系數(shù) - Video technol . , feb . 1999 , 9 : 156 - 160 . 13 pang k k , tan t k . optimum loop filter in hybrid coders
文章的最后，給出了avs第7部分的解碼器和h . 264視頻標(biāo)準(zhǔn)的基本部分解碼器解碼速度和性能的比較。 - The key of the fsk design is the calculation , simulation and optimization of the charge pump pll chip , vco and loop filter
Fsk電路關(guān)鍵是電荷泵pll芯片、 vco電路和環(huán)路濾波器的參數(shù)計(jì)算和仿真優(yōu)化。 - The paper introduces the phase - locked loop first , including its working theory , the design of the loop filter and noise
本文首先介紹了鎖相環(huán)。對(duì)它的工作原理、環(huán)路濾波器的設(shè)計(jì)以及噪聲理論進(jìn)行了闡述。 - The design method of loop filter is a new breakthrough , and it is one of the emphases in this paper
其中，較大篇幅用于介紹位時(shí)鐘跟蹤環(huán)，該環(huán)路中環(huán)路濾波器的設(shè)計(jì)方法是一種全新的方法，也是本文的重點(diǎn)之一。 - It's difficult to find loop filter in a sentence. 用loop filter造句挺難的
- In the pll ' s design and debugging , the loop filter ' s design theory and the affect of the loop - bandwidth on the phase noise was focused on
在pll的設(shè)計(jì)和調(diào)試過(guò)程中，著重研究了環(huán)路濾波器的設(shè)計(jì)理論和環(huán)路帶寬對(duì)相噪的影響。 - The pll consists of a crystal oscillator , a ring voltage - control - oscillator , a frequency divider , a phase / frequency detector , a charge pump and a loop filter
設(shè)計(jì)的電路包括20mhz晶體振蕩器,鑒頻鑒相器,壓控振蕩器,固定分頻器,電荷泵和低通濾波器。 - It is sticking point for optimizing the performance of pll to confirm the parameter of vco ( voltage controlled oscillator ) and properly design the loop filter
確定壓控振蕩器的各項(xiàng)指標(biāo)、合理設(shè)計(jì)環(huán)路濾波器是優(yōu)化環(huán)路性能的關(guān)鍵，本文對(duì)此作了比較詳細(xì)的分析。 - Loop filter is the key component to keep frequency synthesizer working steadily and outputting signal of excellent performance . in this paper , author proposes a practical method for loop filter , and verifies its reliability in experiment
環(huán)路濾波器是頻率合成器能夠穩(wěn)定的工作和輸出相位噪聲和雜散低的信號(hào)的關(guān)鍵，本文給出了環(huán)路濾波器具體的計(jì)算方法，并通過(guò)實(shí)驗(yàn)證實(shí)了其可靠性。 - At first , it introduces the method of loop parameters , including gain of phase detecting , gain of loop filter and frequency sensitivity , then simulations are done under different structures and parameters . according to the results of simulation , loop structure is decided
在此章中，首先是詳細(xì)地討論了環(huán)路中各個(gè)參數(shù)的計(jì)算；接著是對(duì)各種參數(shù)和結(jié)構(gòu)進(jìn)行了性能仿真，并由此決定了環(huán)路的結(jié)構(gòu)。 - This paper presents the general project design firstly , and then introduces the system hardware circuit design in detail which includes the choice of chips , the loop filter parameters computation and the design of the power amplifier ' s peripheral matching circuit
在介紹了系統(tǒng)總體方案設(shè)計(jì)之后,本文詳細(xì)介紹了系統(tǒng)的硬件電路設(shè)計(jì),包括芯片的選擇,環(huán)路濾波器參數(shù)的設(shè)計(jì),以及功率放大器外圍匹配電路的設(shè)計(jì)。 - The motive of this mm frequency synthesizer is also given in this chapter . chapter 2 emphasizes on the pll , first , introduce the module of basic components of pll , such as phase detector , loop filter and the voltage control oscillate ( vco ) . secondly , describe the theory of the linearity pll
第一章介紹了頻率綜合器(簡(jiǎn)稱頻綜)的發(fā)展過(guò)程,對(duì)各種頻率合成的技術(shù)進(jìn)行了簡(jiǎn)單的概括和對(duì)比,簡(jiǎn)述了毫米波及其特點(diǎn),并介紹了本文所作研究工作的研究目的及意義 - This research about the uhf frequency synthesizer mostly includes the following parts : 1 ) the dds modules include the dds ad9852 part , the lc band pass filter design part , the amplifier design part and lc low pass filter part . 2 ) the pll modules include the design of the loop filter which is the core of pll , lc band pass filter design and the amplifier design . 3 ) the controller modules of the system include the part of pc rs - 232 com port communication with the mcu and the part of the process of controller about urat and mcu
本課題的研究主要包括以下幾個(gè)方面的內(nèi)容: 1 ) dds模塊設(shè)計(jì):包括ad9852部分、 lc帶通濾波器設(shè)計(jì)部分、放大器設(shè)計(jì)部分; 2 ) pll模塊設(shè)計(jì):包括pll關(guān)鍵部件環(huán)路濾波器設(shè)計(jì)、 rflc帶通濾波器設(shè)計(jì)、末級(jí)放大器設(shè)計(jì)部分; 3 )控制模塊設(shè)計(jì):包括計(jì)算機(jī)與單片機(jī)串口通信的電路設(shè)計(jì)部分以及程序設(shè)計(jì)部分。 - The basic operation principle of phase - locked frequency synthesizer and the type of circuits are expatiated systematicly in this paper . the principle of operation on sampling phase detector and some characteristics including the linear tracking and phase noise in phase loop circuits are analyzed deeply . the research is emphased on the theory and design method of circuits in the sampling phase - locked frequency synthesizer . then , the expansion capturing circuit is analyzed and designed for better performance of capturing loop circuits . at last , the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling - holder . the general research on the theory and technology of sampling phase lock in the paper will make a basement for the development of new product
本文系統(tǒng)的闡述了鎖相頻率合成器的基本工作原理及電路類型；較深入地分析了取樣鑒相工作原理及電路、鎖相環(huán)路的線性跟蹤特性和相位噪聲特性；重點(diǎn)對(duì)取樣鎖相頻率合成器電路理論和設(shè)計(jì)方法進(jìn)行了研究；為了改善環(huán)路的捕獲性能，對(duì)擴(kuò)捕電路進(jìn)行了分析和設(shè)計(jì)，并用wewb32軟件對(duì)電路進(jìn)行了仿真；考慮到取樣保持器的附加相移影響，對(duì)環(huán)路濾波器進(jìn)行了分析和設(shè)計(jì)。 - The principle and structure of pll ( phase - locked loop ) , including fll and loop filter , are analyzed and described . the module of carrier synchronization in the all - digit ds - qpsk receiver was carried out in the fpga chip . the problem about the estimation and track of the correlative carrier frequency under high dynamic circumstances was resolved very well
針對(duì)某遙測(cè)遙控全數(shù)字接收機(jī)的研制,對(duì)相干載波同步中的鎖相環(huán)、鎖頻環(huán)、 dpll 、本地nco等進(jìn)行了詳細(xì)的分析和優(yōu)化設(shè)計(jì),在fpga上實(shí)現(xiàn)了高動(dòng)態(tài)全數(shù)字ds - qpsk接收機(jī)中的載波同步模塊,解決了大范圍和動(dòng)態(tài)多普勒頻移下接收機(jī)的相干載波提取與跟蹤問題。
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